The present invention relates to the field of integrated circuit memory technology. More specifically, the present invention provides a nonvolatile memory cell with multiple oxide thicknesses and techniques of operating, programming, erasing, evaluating characteristics of the memory cell, and enhancing the reliability and service life of the memory cell.
Memory cells are used in the implementation of many types of electronic devices and integrated circuits. These devices include microprocessors, static random access memories (SRAMs), erasable-programmable read only memories (EPROMs), electrically erasable programmable read only memories (EEPROMs), Flash EEPROM memories, programmable logic devices (PLDs), field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), among others. Memory cells are used to store the data and other information for these and other integrated circuits.
As integrated circuit technology and semiconductor processing continue to advance, there is a need for greater densities and functionality in integrated circuits, which are often determined in a large part by the size of the memory cells. Further, it is desirable that the memory cells have improved operating characteristics, such as lower power consumption, nonvolatility, greater device longevity, improved data retention, better transient performance, superior voltage and current attributes, and improvements in other similar attributes.
There is a need to provide techniques for programming and erasing the memory cells reliably. For example, during the program operation, memory cells which are not to be programmed should be left undisturbed. There is further a need for improved techniques of evaluating the physical characteristics of nonvolatile memory cells. These physical characteristics or properties are important in the determination of an integrated circuit's service life and reliability. These measurements are also useful for study and use in improving memory cells. One property of a memory cell is margin, including program and erase margin, indicating the degree to which a cell is in a programmed or erased state. The degree of margin comes from a determination of the threshold voltages in the programmed and erased states. In particular, the voltage threshold (VTE) of erased nonvolatile memory cells such as EEPROM or Flash cells may be negative.
As can be seen, improved memory cells and techniques for operating, programming, erasing, and evaluating characteristics of these cells are needed. Improved techniques are also needed for improving the reliability and longevity of these memory devices.